Engineer, Principal- Test


Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.



Job Req ID: 561 



Job Posting Title: Engineer, Principal- Test



City: Irvine



State: California



Country: USA



Alternate Location: N/A



Percent of Travel Required: 0% – 25%



Job Function: Engineering



Discipline: ENG-Other-Test



Broadcom is a global innovation leader in semiconductor solutions for wired and wireless communications. This is an opportunity to join the team that performs physical layer testing of the high-speed serial interfaces for Broadcom’s industry-leading suite of knowledge-based processor chips. These chips feature very high port count serial interfaces optimized for packet header processing. The unique combination of massively parallel architecture and integrated algorithmic technology enables line rate performance up to hundreds of gigabits per second. This technology is essential for the majority of telecommunications applications, including routers (core, edge and multi service), enterprise, datacenter and carrier Ethernet switches. Your career at Broadcom as a member of the serdes test team for knowledge-based processor chip design verification will help fulfill our goal of “Connecting Everything”. 


In this role you will


– Devise test methods to evaluate the performance and operating margins of high-speed serial interfaces and supporting circuitry on networking and other ICs.


– Devise statistically and scientifically sound methodologies to determine &/or verify the effectiveness and accuracy of a variety of challenging analog tests. 


– Measure electrical characteristics in the picosecond regime for newly designed integrated circuits for communications.


– Work closely with chip designers to improve the testability and test methodologies of various circuits.


– Research and evaluate state of the art test equipment, modules, and components to design the optimal configuration of test hardware for the


most accurate testing possible.


– Utilize state of the art bench test equipment to determine the parametric performance of networking ICs with the ultimate precision and accuracy.


– Utilize a broad set of skills to isolate issues at the system, sub-system, PCB, chip package, and die level, working individually or with a team of system/board, chip, and package designers.


– Design automated bench level device testing procedures by utilizing programmable test equipment.


– Participate in the design and development of chip evaluation fixtures (particularly printed circuit boards), test hardware, and test equipment, interacting with vendor and other internal hardware design engineers.


– Generate comprehensive test reports with creative and clear analysis methods that highlight the relationships between stimulus / setup conditions and device performance.


 


Typically requires BS degree and 12 years of work experience or an MS degree and 9 years of work experience or a PhD and 6 years of work experience, with 3 years minimum experience in High Speed Signal test/DVT or related fields.


– Must understand and implement test methods required for high-speed custom & standards-compliant serializer-deserializer products.


– Must develop, accurately track, and meet commitments to product characterization or engineering development schedules.


– Understand and be very familiar with the operation and principles of modern high speed test equipment, including but not limited to power supplies, multimeters, spectrum analyzers, oscilloscopes (with emphasis on jitter and noise analysis), bit error rate testers (including modulation/jitter sources), network and logic analyzers.


– Able to measure, understand and analyze causes of jitter and noise.


– Understand fundamentals of VLSI IC I/O & control, and built-in self test (BIST). 


– Familiarity with test methods and testing standards for electrical performance and compliance testing with any of the following communication standards


is beneficial:


– Local Area Networking: 10G/40G/100G/400G Ethernet (IEEE 802.3 standards and/or ITU-T G-series recommendations)


– Personal computer busses: Serial ATA, PCI-Express, USB3


– Telecommunications: SONET/SDH, OTN – Familiarity with usage & principles of fiberoptic components in a system / testbed application such as


couplers, lasers, optical amplifiers, & optical fiber is beneficial.


– Safety conscious with clean and orderly work habits.


– Skilled in the use of calibration standards and methodologies.


– Excellent verbal and written communication skills and presentation skills.


– Well organized, methodical, and detail oriented.


– Team player and can easily work with different personalities and skill levels.


 


 


J2W:LI-TM1


 


Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)





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