Engineer, Sr Staff- IC Design


Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.



Job Req ID: 550062 



Job Posting Title: Engineer, Sr Staff- IC Design – DFT



City: Austin



State: Texas



Country: USA



Alternate Location: N/A



Percent of Travel Required: 0% – 25%



Job Function: Engineering



Discipline: ENG-Hardware-IC Design



As a member of the DFT team at Broadcom Corporation, you will be responsible for DFT architecture, implementation (both front end and backend), pattern generation and ATE test vector debug.






 






In this role you will:






Work closely with the design team during implementation phase and with the test engineer during post silicon debug phase. You will also work with many cross functional team members, and have the opportunity to enhance the design methodology.






 






Your responsibilities include:



• Setup DFT flow and implement on IC’s containing various complex IP’s



• Insert MBIST for the memory modules.



• Close timing on the Scan logic.



• Generate ATPG test pattern.



• Work with Test Engineers to bring up test vectors on ATE using full-speed test and self-test flow



• Synthesize complex system on chip designs.



• Interface with Place and Route team and analog design team






 






Qualifications Required



MSEE with 5+ years or BS with 7+ year experience is required



• Must have 3-5 years in DFT on complex chips using industry standard DFT flows, preferably from Mentor Graphics



• Knowledge of Test Kompress or Logic Vision – LBIST is a plus.



• Must have full-speed test and self-test flow experience



• Solid knowledge of DFT concepts of Scan, BIST is essential.



• Experience working with ATE test engineers is a plus.



• Verilog RTL coding experience required.



• Synthesis using Synopsys tool suite experience required.



• Timing Analysis using Synopsys Primetime tool, and timing closure experience essential.



• Formal Verification and Lint tools experience desirable.



• Knowledge of standard scripting languages such as PERL, TCL Unix Scripting is highly desirable.



• Strong Pre and Post silicon debugging Skills and Knowledge in using debugging tools.



• Must be a team player with good verbal and written communication skills



• Must be self-driven engineer with good problem solving skills to deliver high quality output in a timely manner.



Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)





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