Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 554343
Job Posting Title: Engineer, Staff I- Packaging
City: Irvine
State: California
Country: USA
Alternate Location: N/A
Percent of Travel Required: 25% – 50%
Job Function: Engineering
Discipline: ENG-Other-Packaging
Job Description
- Work with Business Units chip design team & Central Engineering Analog / Digital IP owners (e.g. 56 Gbps PAM4, GDDR5, HMC interface etc.) for chip floor plan & IP bump pattern design and optimization for package design requirements (e.g. layer-count, stack-up, escape architecture, BGA pattern development, s-parameter extraction/comprehension and optimization [RL, NEXT/FEXT, IL etc.], and power integrity [PI] requirements)
- Work with business unit marketing and IC design teams to select the optimum package solution (cost, performance, manufacturability, and reliability)
- Work with IC design, system design, package SI/PI & thermal engineering teams to design custom packages
- Ensure designed packages meet CPI, SI/PI, and Thermal requirements
- Manage IC packaging activity from concept through development, qualification and high volume production
- Define assembly BOM, process, troubleshoot and provide sustaining support on packaging issues
- Implement, fine-tune, and productize newly developed technologies
- Create package design documentation and assembly instructions
- Work close with QA and customers to resolve quality issues
- Interface with packaging assembly and substrate suppliers for new product bring-up, qualification and production ramp
- Interface with other operations functional groups such as product engineering, foundry, test, and QA
- Participate in package technology development and/or other business productivity projects which have broad team impact (e.g. assembly process enhancement, new TIM development etc.)
- Interface with tier #1 external customers for custom ASIC programs or as needed (e.g. Cisco, Alcatel-Lucent, Huawei, and Facebook etc.)
Job Requirements
- BS with 3 years of experience or MS in Material Science/Electrical/Mechanical/Chemical Engineering
- Strong knowledge in physics fundamentals along with solid depth in at least one area of specialty such as materials, mechanics, electrical engineering, or chemistry
- Must be pro-active and eager to learn signal integrity and power integrity concepts such as characteristic impedance, s-parameters (RL, IL, FEXT/NEXT etc.), power plane impedance profile requirements and optimization etc.
- Must have strong desire to become an authority on using Cadence APD for custom substrate design
- Hands-on expertise of assembly processes for flipchip, wirebond, MCM packages, and 2.5D is a plus
- Must be able to quickly develop good understanding of materials as related to Chip Packaging Interaction (CPI)
- Must be pro-active to become familiarity with wafer BEOL as related to CPI (top metal, AP, passivation, UBM, bumping etc.)
- Must want to and be able to learn quickly about detail substrate manufacturing/process
- Must be interested in learning & utilizing failure analysis techniques
- Must be able to learn about conceptual knowledge of package cost structure
- Good project management, communication and leadership skills
- Must want to learn about GD&T and be able to read/comprehend mechanical drawings
- Must be able to quickly learn and grasp manufacturing and quality engineering fundamentals (DOE, process capability indices, etc.)
- Job requirements are broad; the candidate must be able to expand and grow in multiple disciplines (manufacturing/quality, materials, electrical, thermal, and mechanical)
- Track record of innovation and subject matter expertise through journal publications and/or patent awards is a plus
- Familiarity with advanced technologies such as 2.5D, 3D patterned structures such as inductors in package substrate, coreless substrate technology is a plus
Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)
Job Segment:
Package Design, Semiconductor, Thermal Engineering, Manufacturing Engineer, Engineer, Manufacturing, Science, Engineering
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