Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 545447
Job Posting Title: Sr. Staff ASIC Design Engineer
City: Irvine
State: California
Country: USA
Alternate Location: US – California, Northern – Bay Area
Percent of Travel Required: 0% – 25%
Job Function: Engineering
Discipline: ENG-Hardware-IC Design
Understanding of the ASIC design and Verification flow from RTL to GDSII.
Responsibilities:
– Detail understanding of RTL design, synthesis, static timing analysis, formal verification, clock domain crossing, and low power design techniques
– Knowledge and experience of ARM Based SoC, DSP based design, understanding of analog interfaces and designs is a definite advantage
– Work with architecture team to define micro-architecture for various design blocks & subsequently Verilog RTL development
– Run various frontend tools to check for linting, clock domain crossing, Low Power design and checks using UPF/CPF flow
– Work with physical design team on design constraint and timing closure
– Work with verification team to colloborate on test plan, coverage plan, and coverage closure
– Work with systems team during design bringup on Silicon or FPGA platform
– Additionally help with design verification when needed
– Willing to learn new areas and flexible in taking any of the above tasks to help meet project goals
Requirements:
o BSEE/MSEE with 6+ years of experience in Microarchitecture & RTL Design
o Strong Logic Design & RTL Design Skills using Verilog HDL
o Ability to understand engineering and microarchitecture specifications
o Experience with ARM CPUs, peripherals such as I2C, SPI, UART, Asynchronous interface designs, DSP, Memory Controllers, peripherals and interconnect protocols such as AHB, AXI, PCIe, etc.
o Experience and understanding of DSP Designs using Matlab/Simulink is a definite advantage, but not limited to DSP designs
o Good knowledge of EDA tools
o Experience with Low Power Design & design verification techniques
o Experience with C/C++ and Scripting languages (Perl/Tcl)
o Able to work in lab with logic analyzers and oscilloscope during Silicon/FPGA Bring up
o Must be a very good team player with a very good oral and written communication skills
Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)
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