Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 405
Job Posting Title: Engineer, Sr Staff- IC Design
City: Irvine
State: California
Country: USA
Alternate Location: US – California, Southern – Irvine
Percent of Travel Required: 0% – 25%
Job Function: Engineering
Discipline: ENG-Hardware-IC Design
Would you like to conceive and develop leadership silicon technology for Google, Facebook, and other cloud operators? Come join the team creating technology that fuels web2.0, mobile content, and cloud mega-datacenters! The Cumulus program is the first in a series of high throughput Ethernet controllers that deliver unprecedented performance at critically important power efficiency.
We are looking for engineers that want to create new designs that can evolve rapidly over the next several generations in a very dynamic market. Broadcom intends to provide a complete interconnect solution with Cumulus and associated switch products – with performance enhancements when using an all Broadcom solution. Cumulus is the first controller of this strategic segment, and will use a new architecture. This architecture will scale from traditional x86 servers to an emerging microserver segment, and all the way to high core count ARM-based SoCs.
This is a rare opportunity to be part of a ground up design, the lead product for a new line of devices. The candidate will work with our worldwide design and architecture team, along with members of our Switch Team partners, to develop a new world class device. All aspects of front end design will be involved, along with opportunities for technical leadership.
In this role you will:
• Develop Feature based verification Plans
• Extract requirements from specifications
• Develop UVM Based Constrained Random Testbenches
• Develop reusable Verification Components
• Drive Functional Coverage Closure
Requirements:
• Total experience required is typically a BS degree and 9 years of experience, an MS degree 6 and years of experience or a PhD and 3 years of experience or equivalent.
• Education degree should be in EE (Electrical Engineering) or CS (Computer Science) or equivalent.
• Experienced in Ethernet network and network controller/SOC microarchitecture & design • Proficient with VLSI methodology/verification flow
• RTL verification and debug expertise
• Experience with high speed designs
• Strong SystemVerilog with uVM Experience
• Experience with e Specman, Verilog, PERL, TCL, C/C++ programming skills
• Experience in Assertion-Based Verification, Logic Modeling, Reference Model Development
• Expertise in Full chip Verification Planning and development effort
• Proficient with State of art CAD tools
• Must have excellent problem solving skills
• Strong interpersonal skills, stakeholder management, communication and influencing skills
• Able to assume responsibility and be proactive taking initiative to address issues, set direction and meet commitments.
• Excellent verbal and written communication skills and customer presence.
EmoticonEmoticon