Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 550321
Job Posting Title: Engineer, Sr Staff- IC Design
City: San Jose
State: California
Country: USA
Alternate Location: US – California, Northern – Bay Area
Percent of Travel Required: 0%
Job Function: Engineering
Discipline: ENG-Hardware-IC Design
We are looking for bright, motivated, innovative, and hardworking engineers to join our top notch engineering team. You will work closely with various product engineering teams as well as our internal quality assurance team to define and implement improvements for soft error management with Broadcom’s Network Switching devices. You will be challenged and gain valuable experience towards enhancing a successful career in ASIC digital design.
The candidate will be part of Infrastructure and Networking team at Broadcom. He/she will partner with Broadcom’s central QA (quality assurance team) and focus on SER methodology for Infrastructure and Networking products. He/she will be exposed to state of the art in chip development tools and participate in delivering products in the networking area. He/she will work on highly technically challenged tasks in different phases of product development. Responsibility includes:
– Manage, maintain, and improve our Network Switching Soft Error Design Guidelines
– Support per-project SER chip-level tape out reviews
– Evaluate advanced tools & design techniques for SER protection for memories and digital logic
– Build end customer and AE documentation related to SER handling
– Support software team in review and debug for S/W SER recovery mechanisms
– Support post-silicon product qualification & measurement for soft errors
Job Requirements
• Typically requires a BS degree and 9 years of experience, an MS degree and 6 years of experience or a PhD and 3 years of experience or equivalent.
• Experience with digital design of memories and standard cell logic.
• Solid understand of soft error management for large ASIC developments
• Working knowledge of advanced technology nodes (28nm, 16nm) in relation to soft error effects
• Must have good RTL experience including specification, design, verification, and synthesis. Must have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with reusable HDL coding styles and design for high volume manufacture.
• Excellent written and verbal communication skills
Other highly desirable experience:
• Familiarity with DFT and backend design flows
• Ethernet Protocols
• Ethernet switch experience
Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)
Job Segment:
Semiconductor, Engineer, Network, Embedded, Design Engineer, Science, Engineering, Technology
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