Broadcom’s pure digital CMOS approach to developing wireless chipsets and systems solutions provide the technology to make wireless personal area networking a reality. Providing radio frequency, baseband, system, and complete software support to OEMs and system integrators, Broadcom’s wireless personal area networking chips enable wireless sharing of data among scores of electronic devices, from mobile phones to automobiles.
The candidate will be responsible for systems design and implementation tasks associated with next generation wireless products (BT, ZigBee, NFC, 802.11ad, WLAN, etc.). The candidate will work within the systems development team to develop algorithms and practical implementations of these algorithms in hardware.
Responsibilities
- Developing practical implementations of high speed receiver algorithms, carefully architected for low-power and high-throughput.
- Simulating and verifying the performance of these implementations with other teams.
- Development and debugging of bit and cycle accurate models of these algorithms.
- Chip bring-up, performance testing/evaluation, and trouble-shooting problems.
Requirements
- Electrical engineering or computer science degrees: typically, a BS degree and 6 years of experience, an MS degree and 3 years of experience, or a PhD degree or equivalent.
- Strong fundamentals in digital communications, signal processing, and hardware design.
- Design and implementation experience in wireless communication architectures.
- Proficiency in C/C++ and Matlab/Simulink are required.
- Experience in wideband single carrier or OFDM receivers is a plus.
- Background in RTL design and analog/RF is desirable.
- Knowledge of scripting languages such as Perl, TCL, and Python is a plus.
- Experience with lab equipment such as oscilloscopes, spectrum analyzers, logic analyzers, etc. is desirable.
- Good communication skills and willingness to interact with various groups within the company.
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