Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 383895
Job Posting Title: Sr. Staff Physical Design Engineer
City: Santa Clara
State: California
Country: USA
Alternate Location: US – California, Northern – Bay Area
Percent of Travel Required: 0% – 25%
Job Function: Engineering
Discipline: ENG-Hardware-IC Design
The position involves both implementation and development of tasks for full chip physical design.
Responsibilities:
• full chip floor-planning and partitioning
• synthesis
• block level place and route
• clock tree synthesis
• power and signal integrity analysis
• timing closure
• physical verification experience
Requirements:
Typically requires a BS and 12+ years of related experience or an MS and 9+ years of related experience or a PhD and 6+ years of related experience
• Must have a very strong background in physical design and should have relevant work experience in SOC designs in DSM technologies using the latest Atoptech, Cadence, Synopsys, and Mentor Graphics tools
• Prior work experience in timing closure, STA, power and noise analysis, clock distribution and other tape-out issues a must
• Scripting skills in perl and tcl is a major plus
Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)
Job Segment:
Semiconductor, Network, Engineer, Embedded, Design Engineer, Science, Technology, Engineering
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