Engineer, Sr Principal- IC Design


Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.



Job Req ID: 383893 



Job Posting Title: Engineer, Sr Principal- IC Design – Verification



City: Longmont



State: Colorado



Country: USA



Alternate Location: US – California, Northern – Bay Area; US – California, Southern – Irvine; US – Colorado



Percent of Travel Required: 0%



Job Function: Engineering



Discipline: ENG-Hardware-IC Design



Become a key member of our 10GBT Ethernet PHY Design Verification team. Work on design verification of next generation 10GBT PHYs with leading edge performance and features. Broadcom’s family of 10GBASE-T chips offer low power, small size, interoperability, and backwards compatibility over twisted pair cabling, which is well suited for distances of up to 100m over structured cabling in the data center.


 


Key roll responsibilities:


Develop Feature based verification plans


Extract requirements from specifications


Develop block and chip level Constrained Random Testbenches that heavily utilize OOP, Polymorphism and Inheritance


Develop reusable Verification Components


Drive Functional Coverage Closure


Regress and debug test case failures


Interact with design team


Support post silicon activities


 


Requirements:


Typically requires a BS degree and 15 years of experience or an MS degree and 12 years of experience or a PhD and 9 years of experience


BS/MS in Electrical Engineering, Computer Science, or Computer Engineering


Minimum 8+ years experience in Design Verification


Experience in verifying designs at system level and block level


Strong experience developing block and chip level Constrained Random Testbenches that heavily utilize OOP, Polymorphism and Inheritance


Strong knowledge of object oriented programming language


Strong knowledge of System Verilog


Experience with VMM/OVM/UVM


Excellent debug and problem solving skills


Knowledge and experience in ASIC design verification flows and methodologies


Proficient with State of the art CAD tools.


Well organized and detail oriented


Self-motivated, excellent communication skills and ability to excel in a team environment


Excellent verbal and written communication skills


Experience with Ethernet and/or PHY development a plus


Experience with ARM architecture is a plus


Scripting with Unix, Perl, Python and TCL a plus


Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)





Job Segment:
Semiconductor, Engineer, Network, CAD, Electrical, Science, Engineering, Technology


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