Broadcom Corporation (NASDAQ: BRCM), a FORTUNE 500® company, is a global leader and innovator in semiconductor solutions for wired and wireless communications. Broadcom® products seamlessly deliver voice, video, data and multimedia connectivity in the home, office and mobile environments. With the industry’s broadest portfolio of state-of-the-art system-on-a-chip and embedded software solutions, Broadcom is changing the world by Connecting everything®.
Job Req ID: 551803
Job Posting Title: Engineer, Staff II- IC Design
City: San Jose
State: California
Country: USA
Alternate Location: N/A
Percent of Travel Required: 0% – 25%
Job Function: Engineering
Discipline: ENG-Hardware-IC Design
This position is mainly for working on hierarchical block as well as top level physical design for internal as well as ASIC chips. Hands on experience on AP/PrimeTime/Calibre. Good understanding on STA/CTS is highly preferred. Skillful in scripting languages like Perl/TCL. The candidate will work with the latest TSMC technology during the implementation of the physical blocks from netlist to gds2. The individual needs to work closely with customer and methodology group. Good teamwork player and good attitude is a must and should be able to work under pressure with tight schedules. Good communication skill is highly desirable.
Job Responsibilities:
-Physical implementation of hierarchical blocks from netlist to gds2
-Floorplanning including memory and analog IPs. Interact with Design engineers to understand dataflow and place macros accordingly.
-Write custom scripts for optimized cell placements to meet timing/routability.
-Create good clock tree structure to minimize skew/insertion delays
-Analyze timing in P&R tool and optimize paths to meet timing. Discuss with DE if design changes needed
-Analyze routing. Cleanup shorts and drc’s if needed.
-Run Primetime STA. Analyze reports and fix timing/noise/drv etc. to meet tapeout criteria
-Run calibre and analyze lvs/drc reports and fix violations.
-Implement eco if needed
-Support customers on the place and route, STA flow.
Job Requirements:
– BS or equivalent in Electrical Engineering with minimum 6-8 years of prior hands on experience on physical implementation
-Knowledge of verilog
-strong knowledge of STA .
-Good knowledge custom clock tree synthesis
-strong tcl/perl script writing skill
-Should possess strong verbal and written communication skill
-Hands on experience with Atop or cadence EDI is plus
Broadcom is an equal opportunity employer (Minorities/Females/Disabled/Veterans)
Job Segment:
Semiconductor, Engineer, Electrical, Network, Embedded, Science, Engineering, Technology
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